PHP код:
.include "tn2313def.inc"
.def Temp=R16
.def OutPB=R17
.def OutPD=R18
.def StPref=R31
.dseg
Status : .byte 12
onoff : .byte 1
S : .byte 1
UUU : .byte 1
Schet : .byte 1
Br : .byte 12
.cseg
.org 0
rjmp RESET ; Reset Handler
rjmp EXT_INT0 ; IRQ0 Handler
rjmp EXT_INT1 ; IRQ1 Handler
rjmp TIM_CAPT1 ; Timer1 Capture Handler
rjmp TIM_COMP1 ; Timer1 Compare Handler
rjmp TIM_OVF1 ; Timer1 Overflow Handler
rjmp TIM_OVF0 ; Timer0 Overflow Handler
rjmp UART_RXC ; UART RX Complete Handler
rjmp UART_DRE ; UDR Empty Handler
rjmp UART_TXC ; UART TX Complete Handler
rjmp ANA_C ; Analog Comparator Handler
EXT_INT0 : reti
EXT_INT1 : reti
TIM_CAPT1 : reti
;TIM_OVF0 : reti
TIM_OVF1 : reti
;UART_RXC : reti
UART_DRE : reti
UART_TXC : reti
ANA_C : reti
;TIM_COMP1 : reti
reset:
ldi Temp,RamEnd ;Чтобы вызывать Функции
out SPL,Temp ;
ldi temp,0b01000010 ;Выбор Timer1 Compare Handler
out TIMSK,temp ;и переполнение тамера 0
ldi temp,0b00000010 ;Делитель /8
out TCCR1B,temp ;
ldi temp,0b00000101
out TCCR0,temp
ldi temp,0x0 ;Установка таймера
out OCR1AH,temp ;
ldi temp,0x23 ;
out OCR1AL,temp ;
ldi temp,(1<<RXEN)|(1<<RXCIE) ; включить приемник | разрешить прерывание
out ucr,temp ;
ldi temp,3 ; 115200/кварц 7.3728
out ubrr,temp
ldi Temp,0b11111111 ;Порт D на вывод
out ddrd,Temp ;
ldi Temp,0b11111111 ;Порт B на вывод
out ddrb,Temp ;
sei ;Разрешить прерывания
ldi StPref,0
ldi r19,1
ldi r20,1
ldi r21,1
ldi r22,1
ldi r23,1
ldi r24,1
ldi r25,1
ldi r26,1
ldi r27,1
ldi r28,1
ldi r29,1
ldi r30,1
;------------Основная програма---------------;
IndicCycle:
rjmp IndicCycle
TIM_OVF0:
lds temp,s
inc temp
sts S,temp
cpi temp,50
brne Ex33
ldi temp,0
sts s,temp
ldi temp,0
sts br,temp
sts br+1,temp
sts br+2,temp
sts br+3,temp
sts br+4,temp
sts br+5,temp
sts br+6,temp
sts br+7,temp
sts br+8,temp
sts br+9,temp
sts br+10,temp
sts br+11,temp
Ex33:
reti
UART_RXC :
cli
ldi temp,0
out TCNT0,temp
sts s,temp
ldi temp,1
sts onoff,temp
in temp,udr ; в udr приходит байт с компа
sts UUU,temp ;
Cpi temp,255 ;
breq begin ;
rjmp CopyByte ;
Begin:
ldi StPref,1
rjmp Ex
CopyByte:
cpi StPref,1
breq CopyB1
cpi StPref,2
breq CopyB2
cpi StPref,3
breq CopyB3
cpi StPref,4
breq CopyB4
cpi StPref,5
breq CopyB5
cpi StPref,6
breq CopyB6
cpi StPref,7
breq CopyB7
cpi StPref,8
breq CopyB8
cpi StPref,9
breq CopyB9
cpi StPref,10
breq CopyB10
cpi StPref,11
breq CopyB11
cpi StPref,12
breq CopyB12
cpi StPref,13
breq Ex
rjmp Ex
CopyB1:
lds temp,UUU
sts Br,temp
rjmp Ex1
CopyB2:
lds temp,UUU
sts Br+1,temp
rjmp Ex1
CopyB3:
lds temp,UUU
sts Br+2,temp
rjmp Ex1
CopyB4:
lds temp,UUU
sts Br+3,temp
rjmp Ex1
CopyB5:
lds temp,UUU
sts Br+4,temp
rjmp Ex1
CopyB6:
lds temp,UUU
sts Br+5,temp
rjmp Ex1
CopyB7:
lds temp,UUU
sts Br+6,temp
rjmp Ex1
CopyB8:
lds temp,UUU
sts Br+7,temp
rjmp Ex1
CopyB9:
lds temp,UUU
sts Br+8,temp
rjmp Ex1
CopyB10:
lds temp,UUU
sts Br+9,temp
rjmp Ex1
CopyB11:
lds temp,UUU
sts Br+10,temp
rjmp Ex1
CopyB12:
lds temp,UUU
sts Br+11,temp
rjmp Ex1
ex1:
inc StPref
ex:
sei
reti
;-----Обработчик прерывание таймера----------;
TIM_COMP1 :
ldi temp,0
out TCNT1H,temp
out TCNT1L,temp
rcall Pwm
reti
;---------------------PWM--------------------;
PWM:
lds temp,Schet
inc temp
sts Schet,temp
cpi temp,254
breq init
rjmp pwm1
Init:
lds r19,br
lds r20,br+1
lds r21,br+2
lds r22,br+3
lds r23,br+4
lds r24,br+5
lds r25,br+6
lds r26,br+7
lds r27,br+8
lds r28,br+9
lds r29,br+10
lds r30,br+11
ldi temp,0
sts Schet,temp
ldi temp,1 ;
sts status,temp ;
sts status+1,temp ;
sts status+2,temp ;
sts status+3,temp ;
sts status+4,temp ;
sts status+5,temp ;
sts status+6,temp ;
sts status+7,temp ;
sts status+8,temp ;
sts status+9,temp ;
sts status+10,temp ;
sts status+11,temp ;
Pwm1:
;-------------KANAL1---------------;
lds temp,status
cpi temp,0
breq kanal2
sbr OutPB,0b10000000
lds temp,Schet
CPSE temp,r19
rjmp kanal2
cbr OutPB,0b10000000
ldi temp,0
sts status,temp
;-------------KANAL2---------------;
kanal2:
lds temp,status+1
cpi temp,0
breq kanal3
sbr OutPB,0b01000000
lds temp,Schet
CPSE temp,r20
rjmp kanal3
cbr OutPB,0b01000000
ldi temp,0
sts status+1,temp
;-------------KANAL3---------------;
kanal3:
lds temp,status+2
cpi temp,0
breq kanal4
sbr OutPB,0b00100000
lds temp,Schet
CPSE temp,r21
rjmp kanal4
cbr OutPB,0b00100000
ldi temp,0
sts status+2,temp
;-------------KANAL4---------------;
kanal4:
lds temp,status+3
cpi temp,0
breq kanal5
sbr OutPB,0b00010000
lds temp,Schet
CPSE temp,r22
rjmp kanal5
cbr OutPB,0b00010000
ldi temp,0
sts status+3,temp
;-------------KANAL5---------------;
kanal5:
lds temp,status+4
cpi temp,0
breq kanal6
sbr OutPB,0b00001000
lds temp,Schet
CPSE temp,r23
rjmp kanal6
cbr OutPB,0b00001000
ldi temp,0
sts status+4,temp
;-------------KANAL6---------------;
kanal6:
lds temp,status+5
cpi temp,0
breq kanal7
sbr OutPB,0b00000100
lds temp,Schet
CPSE temp,r24
rjmp kanal7
cbr OutPB,0b00000100
ldi temp,0
sts status+5,temp
;-------------KANAL7---------------;
kanal7:
lds temp,status+6
cpi temp,0
breq Kanal8
sbr OutPB,0b00000010
lds temp,Schet
CPSE temp,r25
rjmp kanal8
cbr OutPB,0b00000010
ldi temp,0
sts status+6,temp
;-------------KANAL8---------------;
kanal8:
lds temp,status+7
cpi temp,0
breq kanal9
sbr OutPB,0b00000001
lds temp,Schet
CPSE temp,r26
rjmp kanal9
cbr OutPB,0b00000001
ldi temp,0
sts status+7,temp
kanal9:
lds temp,status+8
cpi temp,0
breq kanal10
sbr OutPD,0b01000000
lds temp,Schet
CPSE temp,r27
rjmp kanal10
cbr OutPD,0b01000000
ldi temp,0
sts status+8,temp
kanal10:
lds temp,status+9
cpi temp,0
breq kanal11
sbr OutPD,0b00100000
lds temp,Schet
CPSE temp,r28
rjmp kanal11
cbr OutPD,0b00100000
ldi temp,0
sts status+9,temp
kanal11:
lds temp,status+10
cpi temp,0
breq kanal12
sbr OutPD,0b00010000
lds temp,Schet
CPSE temp,r29
rjmp kanal12
cbr OutPD,0b00010000
ldi temp,0
sts status+10,temp
kanal12:
lds temp,status+11
cpi temp,0
breq OutPo
sbr OutPD,0b00001000
lds temp,Schet
CPSE temp,r30
rjmp OutPo
cbr OutPD,0b00001000
ldi temp,0
sts status+11,temp
;---------Вывод в порт-------------;
OutPo:
Out Portb,OutPB
Out Portd,OutPD
ret